1. Field of the Invention
The present invention relates to electrically programmable and erasable non-volatile memory, and more particularly to nonvolatile memory with recessed shallow trench isolation structures.
2. Description of Related Art
Electrically programmable and erasable non-volatile memory technologies based on charge storage structures known as EEPROM and flash memory are used in a variety of modem applications. A number of memory cell structures are used for EEPROM and flash memory. As the overall dimensions of integrated circuits shrink, the memory cell dimensions shrink, including the channel width. Such device scaling therefore reduces the magnitude of the read current. Reduced read current causes the degradation in the read access time, which is a critical performance parameter of memory.
Thus, a need exists for a nonvolatile memory cell that can be reduce the performance degradation which results from continued scaling of nonvolatile memory devices to smaller dimensions.